Reliable and Secure Memories Based on Algebraic Manipulation Detection Codes and Robust Error Correction

The reliability and security of memories are crucial considerations in the modern digital system design. Traditional codes usually concentrate on detecting and correcting errors of certain types, e.g. errors with small multiplicities or byte errors, and cannot detect or correct unanticipated errors. Thereby, they may not be sufficient to protect memories against malicious attackers with strong fault injection capabilities and cannot correct unexpected errors with high multiplicities.In this paper we present a reliable and secure memory architecture based on robust Algebraic Manipulation Detection (AMD) codes. These codes can provide a guaranteed error detection probability even if both the user defined messages (data stored in the memory) and the error patterns are controllable by an attacker. Moreover, the code can correct any error regardless of its multiplicity as long as the error stays for several consecutive clock cycles. The construction and the error correction procedure for the code will be described. The probability that an error can be successfully detected and/or corrected and the hardware overhead of the proposed memory architecture will be estimated. The presented approach is most efficient for protecting security/reliability critical memories used to store the most important information on the chip (e.g. a secret key in a cryptographic device).